1. Field of the Invention
The present invention relates to a method of manufacturing a MISFET (Metal Insulator Semiconductor Field Effect Transistor) and, more particularly, to a method of manufacturing a MISFET having a gate electrode made of only metal.
2. Description of the Background Art
In recent years, there has been a demand for higher-speed operation and higher integration of semiconductor devices. Gate electrode patterns of MISFETs accordingly have been decreasing in size. However, the decrease in the size of the gate electrode patterns increases electric resistance. To solve this problem, a gate electrode made of a polycide constructed such that a compound film (silicide film) of high-melting-point metal such as tungsten with silicon is formed on a polysilicon film has been recently used in place of a gate electrode made of only polysilicon which has been historically dominant.
With further decrease in gate electrode pattern size, the polycide film cannot meet the requirement for sufficiently low electric resistance of the gate electrode. To overcome this problem, a structure such that a metal film, rather than the silicide film which is a compound, is formed on the polysilicon film has been under study (as disclosed, for example, in Japanese Patent Application Laid-Open No. P09-246543A (1997)).
For still further decrease in electric resistance of the gate electrode, it is desirable that the entire gate electrode is made of metal without using polysilicon.
It is contemplated that the gate electrode made of metal may be manufactured by a background art method to be described below. Initially, as shown in FIG. 48, a gate insulation film material 2, a gate electrode material 11 which is metal and a photoresist 10 are formed on a surface of a semiconductor substrate 1, and the photoresist 10 is patterned. Using the patterned photoresist 10 as a mask, etching is performed to shape the gate electrode material 11 into a gate electrode. Then, the photoresist 10 is removed, as shown in FIG. 49. This completes a MIS gate structure.
However, the use of the above described background art manufacturing method presents a problem to be described below.
The gate electrode material 11 which is metal such as tungsten is often etched by dry etching using BCl.sub.3 gas, SF.sub.6 gas or the like. These gases contain boron and fluorine which are more reactive than oxygen and thus serve as a reductant. Thus, if a silicon oxide film or other oxygen-containing insulation films are used as the gate insulation film material 2, boron and fluorine are prone to substitute for oxygen contained in the gate insulation film material 2 to combine with silicon. As a result, there is a likelihood that the etching of the gate electrode material 11 removes the gate insulation film material 2 and also the semiconductor substrate 1. Thus, it is difficult to ensure an etch selectivity between the gate electrode material 11 and the gate insulation film material 2.